Simple Architecture for Subsampling LC-based Σ∆ Modulators
نویسندگان
چکیده
In this paper, a simple architecture for subsampling LC-based continuous-time Σ∆ modulators is introduced. The concept of utilizing loop delay to simplify the modulator architecture is generalized to subsampling modulators. Moreover, it is shown that is possible to remove delay-compensation branch usually used in traditional designs. Removing delay-compensation branch results in a significant simplification of the modulator architecture, and eliminates several problems usually associated with delay-compensation branch.
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